Organization : Synopsys
Position : Intern (Technical-Engineering)
Location : Bangalore
Education : Graduate in CS / EC / EE
Description :
This Engineer will work with the Power Compiler R&D team to implement synthesis product capabilities including but not limited to Synthesis for Multi-Voltage design, usability and infrastructure enhancements. The engineer will also have to support existing functionality and strive to improve the quality and maintainability of the software. Development will be in C/C++. The engineer will require to perform first level debugging on any issues hit during development, using standard tools available in-house. As part of the job, the engineer will also design and develop testcases in VHDL/Verilog to test the features/bug fixes. The engineer will also be responsible to validate the code changes across the existing Regression testing system and QoR suite. The engineer will have to adhere by the standard practices followed such as code review, testing the code through purify, testing across multiple platforms etc.
Requirements:
Position : Intern (Technical-Engineering)
Location : Bangalore
Education : Graduate in CS / EC / EE
Description :
This Engineer will work with the Power Compiler R&D team to implement synthesis product capabilities including but not limited to Synthesis for Multi-Voltage design, usability and infrastructure enhancements. The engineer will also have to support existing functionality and strive to improve the quality and maintainability of the software. Development will be in C/C++. The engineer will require to perform first level debugging on any issues hit during development, using standard tools available in-house. As part of the job, the engineer will also design and develop testcases in VHDL/Verilog to test the features/bug fixes. The engineer will also be responsible to validate the code changes across the existing Regression testing system and QoR suite. The engineer will have to adhere by the standard practices followed such as code review, testing the code through purify, testing across multiple platforms etc.
Requirements:
- Graduate in CS/EC/EE with excellent C/C++ programming skills, thorough in Data Structures and Algorithms and good Digitial Design knowledge.
- Knowledge of PERL, Tcl and Shell scripting; debugger(gdb).
- HDLs like VHDL/Verilog are an added advantage.
- Should be a self-learner, committed, good team player with good written/oral communication skills.
Apply : Synopsis Application Link
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